1,000+ ASIC Interview Questions: SystemVerilog, UVM & RTL

DescriptionQ292

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Q292DesignArchASIC interview problem

Predict a strict round-robin grant

TechniquesDesignArchDVRound robinCircular priority

DifficultyMedium

TopicArbiters

LanguageSystemVerilog

Requirements5 checkpoints

Problem

Build a stateful predictor for an N-port strict round-robin arbiter. Given a request vector, return the winning port, return -1 when idle, and move priority to the port immediately after each accepted winner.

Strict round-robin predictor interface with request vector, next-start pointer, accepted handshake, and winner output — The pointer identifies where the circular scan begins and advances only after an accepted winner.

Class declarationSystemVerilog

class RRPredictor #(int N = 8);
  function int predict_next(bit [N-1:0] reqs);
  function void update_state(int grant_idx);
  function void reset();
endclass

Example input and output

Use this case to check your interpretation

Input

N=4,next_priority=0; active request ports={1,3}; predict twice

Output

grant port1 then port3; next_priority returns to0

Explanation

The strict circular scan begins at the saved pointer and moves priority to the port immediately after each accepted winner.

Requirements (5)

Give port zero first priority after reset.
Search circularly from the current next-priority port.
Return one winning index or -1 when no request is active.
Update state only for a valid grant index.
Preserve fairness for continuously asserted requesters.