1,000+ ASIC Interview Questions: SystemVerilog, UVM & RTL

DescriptionQ293

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Q293DesignArchFollow-up to Q292ASIC interview problem

Select round-robin winners with rotate and isolate

TechniquesDesignArchBarrel rotateOne-hotPriority encoder

DifficultyHard

TopicArbiters

LanguageSystemVerilog

Requirements5 checkpoints

Problem

Optimize round-robin winner selection with vector operations rather than a procedural N-entry scan while preserving the predictor's priority semantics.

Function headerSystemVerilog

function int predict_next(bit [N-1:0] reqs);

Example input and output

Use this case to check your interpretation

Input

N=4,next_priority=2; request vector has ports {0,3} active

Output

rotated isolate selects original port3; next_priority becomes0

Explanation

Rotating port2 to bit zero makes port3 the lowest active offset; one-hot isolation maps it back without a procedural scan.

Requirements (5)

Rotate the current next-priority position to bit zero.
Isolate the lowest set bit of the rotated request vector.
Encode that one-hot offset and map it back to the original port domain.
Return -1 before performing one-hot decode when no request is active.
Keep state update behavior identical to the strict round-robin predictor.