Design Verification Interview Questions and Answers

The driver should fetch one item, drive its payload and valid once, and wait at clocking-block sample points until ready is exactly 1. It must keep every driven field unchanged during backpressure, lower valid after acceptance, and call item_done only after the handshake edge.

Model occupancy from accepted reads and writes, not raw requests. Permit a write at full only when a read also succeeds, register the popped word, update count from the push/pop combination, and wrap pointers explicitly at DEPTH - 1. In the BFM, use a clocking block and sample registered read data on the following edge.

Use a two-flop synchronizer for a stable one-bit level; convert a short pulse into a source toggle and acknowledge it before accepting another event. Hold multi-bit control data stable under a bundled-data handshake, and carry continuous traffic through an asynchronous FIFO. Each destination domain also needs its own reset-release synchronization.

Clear both stages of a two-flop chain asynchronously when arst_n falls. After arst_n rises, shift a 1 through the chain on destination-clock edges and derive srst_n from the second stage. Instantiate this conditioner separately for every unrelated clock, and reset only state that the design contract requires.

Implement the buffer as a two-entry FIFO with registered occupancy. Set upstream ready whenever occupancy is below two, output the head entry whenever occupancy is nonzero, and update storage from the four push/pop combinations. A stalled output keeps its head value unchanged; a full buffer may insert one bubble because ready cannot anticipate a same-edge pop.

A virtual interface gives the class-based driver a typed reference to an already-elaborated interface instance. Supplying that reference through configuration avoids fixed hierarchical names and lets the same driver connect to different interfaces; the `.master` modport preserves its intended access directions.

Publish the concrete interface handle through `uvm_config_db#(virtual bus_if)` using a scope that covers the agent’s driver and monitor, then retrieve it during each component’s build phase. The UVM factory cannot create an HDL interface instance.

Use `uvm_object` because the configuration is data rather than a structural testbench element. It needs neither a hierarchical parent nor phase callbacks, ports, or persistent component lifetime. Choosing an object keeps construction and reuse simpler without preventing factory registration or randomization.

Create child components during `build_phase`, then bind their TLM connections during `connect_phase`. Construction must finish before connections are made, so every required port, export, and child instance exists when the testbench wiring is established.

A raised run-phase objection keeps that task phase from completing until the objection is dropped. Simulation time and concurrent component tasks continue normally; the objection changes the phase-ending decision, not the scheduler, clock, or execution order.

`base_pkt::type_id::create("p")` is eligible to produce a `crc_pkt`. The type override participates only when a new request goes through the UVM factory; direct `new` calls and objects allocated before the override remain unaffected.

Connect `driver.seq_item_port` to `sequencer.seq_item_export`. The driver initiates the pull operations through its port, while the sequencer exposes the implementation that arbitrates and supplies items. This connection normally belongs in the active agent’s `connect_phase`.

The loop requests a second item before completing the first. After each successful `get_next_item(req)`, the driver must finish driving that request and call `item_done()` exactly once before another `get_next_item`. Otherwise the sequencer-driver handshake can stall or report a protocol violation.

`uvm_analysis_port::write` distributes one transaction handle to every connected subscriber without a return handshake. It is a function-based observation broadcast, permits zero subscribers, performs no arbitration, and does not automatically clone the transaction for each recipient.

Use identity-based matching keyed by transaction ID plus a reset generation, and define what reset does to outstanding expectations. This supports out-of-order completion while preventing a post-reset response from matching stale pre-reset state that happened to use the same ID.