▤DescriptionQ982Page ↗UnlockQ982DesignPPremiumIntelASIC interview problemScan-shift testbench modelTechniquesDesignDFTTestScan-ShiftTestbenchDifficultyMediumTopicPhysical Design and DFTLanguageSystemVerilogRequirementsLocked◇PremiumUnlock this questionPremium prompts and solutions require a Premium access code.Access codeUnlock question