Chapter 1 of 3 · Clock, Reset, CDC and Power

Map domains and release reset safely

Record clock provenance, reset ownership, voltage, traffic, and state, then prove asynchronous assertion, local release, recovery, removal, and reset-domain crossings.

Compare reset-release scenarios Practice questions

Domain atlas

Draw the boundaries before choosing circuitry.

Start with clock provenance, reset ownership, voltage, switchability, and payload direction. Frequency alone never tells you whether a crossing is synchronous.

Primary sourceCrystalIndependent sourceSensor clockElectrical + temporal boundaryCDC · RDC · isolation · level shift

Switchable consumer

Compute island

Clock: clk_compute · 500 MHz
Provenance: PLL output behind an ICG
Reset: Local release after power-good + PLL lock
Power: 0.72 V · Switchable, selected state retained
Traffic: Configuration, samples, completion
Owned state: Filter pipeline, FIFO read side, retained mode
Signoff boundary: CDC + RDC + power-aware + clock-gating checks

Boundary ledger: every crossing receives four classifications
Payload	Source → destination	Clock relation	Reset epoch	Power rule
mode_en	AON → compute	Related while compute clock runs	AON survives compute reset	Clamp before compute OFF
sample_event	Sensor → AON	Independent clocks	Reject stale toggle epoch	Both domains powered
config[31:0]	AON → compute	Related bundled transfer	Handshake restarts after reset	Level shift + isolation
samples	Sensor → compute	Dual-clock FIFO	Pointers converge from empty	Drain before compute OFF

Reset and RDC

Release locally. Reconnect deliberately.

Asynchronous assertion can force safety without a clock. Deassertion is a timed local event, and related state must not reconverge until reset epochs agree.

RDC release scopeSafe structure

clk_compute ↑ defines local release opportunities.

rst_compute_nLocal reset deasserts before readiness is published.
↓ ready_aonAON readiness arrives first.
↓ ready_computeCompute readiness follows AON; local state must already be valid.
↓ traffic_enableTraffic waits for both readiness contracts.

Check recovery/removal, minimum reset pulse width, stage attributes, reset-tree timing, and no traffic before both readiness contracts are true.

Each domain releases reset on its own active edges.Power-good and PLL lock qualify the asynchronous request. A two-stage local chain then deasserts reset in each domain; traffic waits for synchronized domain-ready.

Put it into practice

Explain the decision behind the design.

Practice Clock, Reset, CDC and Power in the question bank

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