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DescriptionQ116
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Q116DesignIntelASIC interview problem

Local repair for a hold violation

TechniquesDesignSTATimingLocalRepair
DifficultyEasy
TopicTiming and STA
LanguageSystemVerilog
Format4 choices
01

Problem

A same-cycle data path reaches the capture flip-flop 35 ps too early. Setup slack on that path is +140 ps. Which local change is the direct hold repair while retaining the same clock period?

02

Answer choices (4)