DescriptionQ686
Q686DVASIC interview problem
Verify duplicate token supply
TechniquesDVReference modelHistogramLatencyReset
DifficultyEasy
TopicReference Models
LanguageSystemVerilog
Requirements4 checkpoints
01
Problem
Verify a command-admission block that decides whether a stock list contains enough copies of every requested 4-bit token.
Starting declarationSystemVerilog
logic clk, rst_n, start;
logic [5:0] request_len, stock_len;
logic [3:0] request_token [32];
logic [3:0] stock_token [32];
logic busy, done, request_error, can_supply;
parameter int MAX_LATENCY = 70;Example input and output
Use this case to check your interpretationInput
request tokens=[2,2,5]; stock tokens=[2,5,2,7]Output
can_supply=1Explanation
Fresh histograms count demand token 2 twice and token 5 once, both no greater than their stock multiplicities.
02
Requirements (4)
- For legal lengths 0 through 32, count only active entries in fresh 16-bin histograms.
- Return true exactly when every requested count is no greater than the stock count; an empty request is true.
- Illegal lengths return request_error with can_supply zero, and inactive suffix entries never affect prediction.
- Snapshot accepted inputs, check one bounded done pulse, and suppress late completion after reset.