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DescriptionQ920
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Q920DVDesignASIC interview problem

Active-region races

TechniquesSystemVerilogScheduling regions
DifficultyMedium
TopicSV
LanguageSystemVerilog
Format4 choices
01

Problem

What can the display legally print under standard scheduling semantics?

Starting declarationSystemVerilog
int x = 0;
initial #1 x = 1;
initial #1 x = 2;
initial begin
  #1; #0;
  $display("%0d", x);
end
02

Answer choices (4)