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DescriptionQ099
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Q099DVGoogleASIC interview problem

Place a formal environment constraint

TechniquesDVFormal verificationAssumptionsReady-valid
DifficultyMedium
TopicAssertions and Formal
LanguageSystemVerilog
Format4 choices
01

Problem

A DUT accepts a request only when ready is high. The interface specification forbids the environment from changing the request payload while valid is high and ready is low. How should that rule normally be modeled when proving the DUT?

02

Answer choices (4)