DescriptionQ625
Q625ArchGoogleASIC interview problem
Split a cache address
TechniquesArchCacheAddress decompositionSet associative
DifficultyEasy
TopicComputer Architecture
LanguageSystemVerilog
Format4 choices
01
Problem
A 4 KiB cache is two-way set associative, has 32-byte lines, and uses 32-bit byte addresses. How many offset, index, and tag bits are used?
02