DescriptionQ534
Q534ArchAppleASIC interview problem
Track retries in a tagged split-transaction link
TechniquesArchMicroarchitectureInterconnectTracklink
DifficultyHard
TopicComputer Architecture
LanguageSystemVerilog
Requirements4 checkpoints
01
Problem
A high-speed link may ask the requester to retry a tagged command up to twice before it finally completes. Implement a SystemVerilog scoreboard for issue, retry, and completion events.
Class declarationSystemVerilog
class retry_scoreboard;
function void issue(bit [5:0] tag, bit [31:0] addr, int unsigned bytes);
function void retry(bit [5:0] tag);
function void complete(bit [5:0] tag, bit ok, int unsigned bytes);
function int unsigned errors();Example input and output
Use this case to check your interpretationInput
issue(tag3,addr=0x1000,bytes=16), retry(tag3), then complete(tag3,ok=1,bytes=16).Output
errors() remains 0 and tag 3 becomes free.Explanation
The one legal retry keeps the original descriptor outstanding, and the matching successful completion retires it.
02
Requirements (4)
- Construction starts with every tag free and errors=0. issue is legal only for a free tag and bytes in 1..64; a legal issue stores addr, bytes, and retry_count=0.
- retry is legal only for an outstanding tag with retry_count below 2; it increments that count but keeps the descriptor outstanding and unchanged.
- complete is legal only for an outstanding tag; ok=1 requires bytes equal to the issued length, while ok=0 requires bytes=0. Either legal completion retires the tag.
- Every invalid issue, unknown event, third retry, or bad completion length increments errors once and leaves the affected outstanding entry unchanged.