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Hardware interview practice

Track retries in a tagged split-transaction link

HardComputer ArchitectureSystemVerilog

A high-speed link may ask the requester to retry a tagged command up to twice before it finally completes. Implement a SystemVerilog scoreboard for issue, retry, and completion events.

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Starting point

Question code

class retry_scoreboard;
function void issue(bit [5:0] tag, bit [31:0] addr, int unsigned bytes);
function void retry(bit [5:0] tag);
function void complete(bit [5:0] tag, bit ok, int unsigned bytes);
function int unsigned errors();
Reviewed example

Work through one case

Input
issue(tag3,addr=0x1000,bytes=16), retry(tag3), then complete(tag3,ok=1,bytes=16).
Expected output
errors() remains 0 and tag 3 becomes free.

The one legal retry keeps the original descriptor outstanding, and the matching successful completion retires it.

What to cover

Requirements

  1. Construction starts with every tag free and errors=0. issue is legal only for a free tag and bytes in 1..64; a legal issue stores addr, bytes, and retry_count=0.
  2. retry is legal only for an outstanding tag with retry_count below 2; it increments that count but keeps the descriptor outstanding and unchanged.
  3. complete is legal only for an outstanding tag; ok=1 requires bytes equal to the issued length, while ok=0 requires bytes=0. Either legal completion retires the tag.
  4. Every invalid issue, unknown event, third retry, or bad completion length increments errors once and leaves the affected outstanding entry unchanged.
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