Hardware interview practice
How a UVM Analysis Port Works
Which statement best describes uvm_analysis_port::write?
Answer choices
- A. It is a zero-time, synchronous transaction-level modeling (TLM) broadcast to zero or more connected subscribers
- B. It blocks until every subscriber calls item_done
- C. It arbitrates among sequences and grants exactly one subscriber
- D. It creates a deep copy for every subscriber
Concise answer
The answer and the key reason
Deeper explanation
Work through the implementation and tradeoffs
Analysis ports model fan-out from producers such as monitors to consumers such as scoreboards, coverage collectors, and loggers. A single `write` invocation forwards the same published item through all connected analysis implementations. Because `write` is a function, subscribers cannot consume simulation time or wait for an `item_done` response.
The transmitted value is an object handle rather than an automatic snapshot. If the producer later mutates a reused transaction, consumers that retained that handle may observe the changed data. A verification environment should therefore define an ownership policy, such as creating a fresh object for every publication or cloning at an agreed boundary.
What to remember
- Broadcasts to all subscribers
- No completion handshake
- Handles are not cloned
Practice the complete prompt
