DescriptionQ586
Q586DesignArchNVIDIAASIC interview problem
XNOR from one 2-to-1 mux
TechniquesRTL DesignRTL / Microarchitecturexnor from one 2-to-1 mux
DifficultyEasy
TopicRTL Design
LanguageSystemVerilog
Requirements4 checkpoints
01
Problem
A small control block may use one 2-to-1 mux and one inverter, but no XOR or XNOR operator. Write synthesizable SystemVerilog for the XNOR function using that structure.
Starting declarationSystemVerilog
input logic a, b;
output logic y;Example input and output
Use this case to check your interpretationInput
a=0 and b=0.Output
y=1.Explanation
With a selecting the mux's zero input, the mux chooses ~b; because b is zero, the selected value is one, matching XNOR.
02
Requirements (4)
- For 0/1 inputs, y must equal one exactly when a and b are equal.
- Use a as the mux select, b on the select-one input, and the inverse of b on the select-zero input.
- Do not use ^, ~^, or == in the implementation of y.
- Use combinational, synthesizable logic with no inferred storage.