DescriptionQ946
Q946DVASIC interview problem
Explicit RAL prediction
TechniquesUVMRegister bus integration
DifficultyMedium
TopicReference Models
LanguageSystemVerilog
Format4 choices
01
Problem
A bus monitor observes all register traffic, including accesses initiated outside the UVM Register Abstraction Layer (RAL). Which setup gives the most coherent mirror behavior?
02