DescriptionQ1009
Q1009DVASIC interview problem
RAL mirror with checking
TechniquesUVMRegister model state
DifficultyMedium
TopicReference Models
LanguageSystemVerilog
Format4 choices
01
Problem
In the UVM Register Abstraction Layer (RAL), a register's pre-read mirror is 0x5 while hardware contains 0x7. A successful mirror(status, UVM_CHECK) is performed on a readable field configured for checking. What is the intended outcome?
02
