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DescriptionQ1043
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Q1043DVDesignASIC interview problem

Always_comb

TechniquesSystemVerilogBasic scheduling
DifficultyEasy
TopicSV
LanguageSystemVerilog
Format4 choices
01

Problem

Which statement about always_comb is correct?

Starting declarationSystemVerilog
logic a, b, hidden_enable, y;

function automatic logic helper(input logic value);
  return value & hidden_enable;
endfunction

always_comb y = a & helper(b);
02

Answer choices (4)