Hardware interview practice
How SystemVerilog always_comb Works
Which statement about always_comb is correct?
logic a, b, hidden_enable, y;
function automatic logic helper(input logic value);
return value & hidden_enable;
endfunction
always_comb y = a & helper(b);Answer choices
- A. It runs only after a or b changes and never at time zero
- B. It makes y a resolved net with unlimited procedural drivers
- C. It permits timing controls such as #1 inside the block
- D. Its inferred sensitivity includes signals read by called functions, and it executes once at time zero
Concise answer
The answer and the key reason
Deeper explanation
Work through the implementation and tradeoffs
Compared with always @*, always_comb adds language rules aimed at expressing combinational intent. Its inferred dependencies extend through function calls, so a change to data read by helper can retrigger the block even when that signal is not written in the visible expression. The guaranteed initial execution also establishes y without waiting for an input transition.
These semantics do not magically prove the logic is combinational. Every path must still assign each output, or an incomplete assignment can imply stored state and trigger a latch warning. The construct also disallows delays and event controls, and tools can diagnose multiple procedural writers. y remains a variable, not a multiply driven resolved net.
What to remember
- Runs once at time zero
- Tracks reads inside functions
- No timing controls allowed
Practice the complete prompt