1,000+ ASIC Interview Questions: SystemVerilog, UVM & RTL

DescriptionQ977

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Q977DVASIC interview problem

Scoreboard immutable counter snapshots

TechniquesDVStateful scoreboardSnapshotReady/validBackpressure

DifficultyHard

TopicReference Models

LanguageSystemVerilog

Requirements5 checkpoints

Problem

Verify a monitor that snapshots 16 counters on a load handshake and answers inclusive range-sum queries from that immutable state until the next accepted load.

Example input and output

Use this case to check your interpretation

Input

load counters=[1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16]; query inclusive [2,4]; mutate the external source after load; stall response

Output

sum=3+4+5=12 from the immutable snapshot; response stays 12 until accepted

Explanation

Each query clones the accepted snapshot, so later source changes cannot affect the pending prediction.

Requirements (5)

Update the model snapshot only on a load handshake and assert that load and query are never accepted together.
Clone the active snapshot into each accepted query expectation before predicting its inclusive sum.
Return error with a zero sum for query-before-load or for left greater than right.
Allow one outstanding query, forbid load while it is pending, and compare only on an accepted response.
Hold the response stable during stalls; reset invalidates the snapshot and clears any pending expectation.