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Hardware interview practice

Scoreboard immutable counter snapshots

HardReference ModelsSystemVerilog

Verify a monitor that snapshots 16 counters on a load handshake and answers inclusive range-sum queries from that immutable state until the next accepted load.

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Reviewed example

Work through one case

Input
load counters=[1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16]; query inclusive [2,4]; mutate the external source after load; stall response
Expected output
sum=3+4+5=12 from the immutable snapshot; response stays 12 until accepted

Each query clones the accepted snapshot, so later source changes cannot affect the pending prediction.

What to cover

Requirements

  1. Update the model snapshot only on a load handshake and assert that load and query are never accepted together.
  2. Clone the active snapshot into each accepted query expectation before predicting its inclusive sum.
  3. Return error with a zero sum for query-before-load or for left greater than right.
  4. Allow one outstanding query, forbid load while it is pending, and compare only on an accepted response.
  5. Hold the response stable during stalls; reset invalidates the snapshot and clears any pending expectation.
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