DescriptionQ969
Q969DesignDVASIC interview problem
Route a shared read bus without internal tri-states
TechniquesBus muxReady/validOwnershipBFM
DifficultyMedium
TopicRTL Design
LanguageSystemVerilog
Requirements5 checkpoints
01
Problem
Design a two-master, one-slave read-bus multiplexer. An external sel chooses the eligible master, only one request may be outstanding, and the response must return to the master that launched it. Add a master BFM read task.
Example input and output
Use this case to check your interpretationInput
cycle1 sel=0 and master0 request A handshakes; sel changes to 1 before slave response A at cycle4Output
response valid/data route only to master0; master1 response path remains known inactiveExplanation
The accepted owner is latched with the request, so a later external selection change cannot misroute the delayed response.
02
Requirements (5)
- Use valid/ready handshakes on requests and an explicit valid on responses.
- Latch the selected owner when the slave accepts a request; sel may change before the response returns.
- Drive inactive response paths to known values rather than high impedance.
- Apply backpressure while a read is outstanding and keep the BFM request stable until accepted.
- The slave response arrives no earlier than the cycle after request acceptance; a zero-latency slave would require an explicit response bypass.