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DescriptionQ675
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Q675FWMicronASIC interview problem

Choose the next experiment for one temperature-sensitive lane

TechniquesSiliconReliabilityDebugChooselane
DifficultyMedium
TopicPost-Silicon & Reliability
LanguageSystemVerilog
Format4 choices
01

Problem

Corrected errors rise on one memory lane at high temperature and largely disappear after link retraining. Other lanes remain clean and no uncorrectable errors occur. Which next experiment most directly distinguishes a shrinking timing eye from a random ECC event-rate change?

02

Answer choices (4)