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Hardware interview practice

Choose the next experiment for one temperature-sensitive lane

MediumPost-Silicon & ReliabilitySystemVerilog

Corrected errors rise on one memory lane at high temperature and largely disappear after link retraining. Other lanes remain clean and no uncorrectable errors occur. Which next experiment most directly distinguishes a shrinking timing eye from a random ECC event-rate change?

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Answer choices

  1. A. Sweep that lane's sampling delay across a fixed data pattern at several temperatures and record corrected-error rate versus tap.
  2. B. Disable corrected-error reporting and repeat the nominal setting once.
  3. C. Replace the ECC decoder model while leaving the physical lane and training taps unchanged.
  4. D. Increase software log verbosity without changing lane timing, pattern, or temperature.
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