1,000+ ASIC Interview Questions: SystemVerilog, UVM & RTL

DescriptionQ584

Page ↗

Q584DesignNVIDIAASIC interview problem

Throttle with temperature hysteresis

TechniquesDesignLow powerPower sequencingThrottleWith

DifficultyMedium

TopicLow Power Design

LanguageSystemVerilog

Requirements4 checkpoints

Problem

A GPU control block throttles at 90 degrees C and stays throttled until temperature falls to 80 degrees C. Implement the synchronous SystemVerilog hysteresis controller.

Starting declarationSystemVerilog

input logic clk, rst_n;
input logic [9:0] temp_c;
output logic throttle;

Example input and output

Use this case to check your interpretation

Input

Start unthrottled and sample temp_c = 89.

Output

throttle remains 0.

Explanation

The controller asserts throttle only at 90 or above, so 89 lies below the entry threshold.

Requirements (4)

When not throttled, set throttle on a rising edge whose sampled temp_c is at least 90.
When throttled, clear throttle on a rising edge whose sampled temp_c is at most 80.
Hold the current state for sampled temperatures from 81 through 89, creating deterministic hysteresis.
When rst_n=0 at a rising edge, clear throttle regardless of temp_c.