DescriptionQ042
Q042DVASIC interview problem
Acknowledge Without an Outstanding Request
TechniquesDVWaveform Debugging
DifficultyEasy
TopicWaveform Debugging
LanguageSystemVerilog
Format4 choices
01
Problem
Only one request may be outstanding. A request becomes outstanding when req is sampled high and is cleared when ack is sampled high. The outstanding row shows the state immediately after each edge. Rule to apply: ack may be 1 only if a request is already outstanding or req is 1 at the same edge. Which assertion fails at C5?
02
