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DescriptionQ200
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Q200DVASIC interview problem

Read Burst Marks the Third Beat as Last

TechniquesDVWaveform DebuggingReady/valid
DifficultyMedium
TopicWaveform Debugging
LanguageSystemVerilog
Format4 choices
01

Problem

Each column is one rising clock edge. The source sends a four-beat read burst. A beat is accepted only when valid=1 and ready=1; accepted_count is the total immediately after each edge. Rule to apply: An edge with ready=0 does not increase accepted_count. For a four-beat burst, last must be 1 only on the fourth accepted beat and must be 0 on the first three accepted beats. Which read-burst assertion fails first on this waveform?

Waveform for Read Burst Marks the Third Beat as Last. Signals: valid, ready, last, accepted_count. Numbered markers identify sampled columns.
Read the sampled columns from left to right, then test each choice against the stated timing rule.
02

Answer choices (4)