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DescriptionQ126
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Q126DVDesignQualcommASIC interview problem

Use Wildcard Case Constructs without Hiding Unknowns

TechniquesDVDesignSystemVerilogClocking
DifficultyMedium
TopicDesign Verification
LanguageSystemVerilog
Format4 choices
01

Problem

A control decoder receives `sel = 2'bx1`. Its source code uses `casex (sel)` with an item `2'b01`, so simulation may select that item even though the high bit is unknown. Which explanation and remedy are correct?

02

Answer choices (4)