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DescriptionQ123
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Q123DVASIC interview problem

APB Select Drops During a Wait State

TechniquesDVWaveform DebuggingAPB
DifficultyMedium
TopicWaveform Debugging
LanguageSystemVerilog
Format4 choices
01

Problem

An APB access begins at C2. PREADY remains low for two wait-state cycles and rises at C4 to complete the transfer. Rule to apply: During an access with PENABLE=1 and PREADY=0, PSEL, PENABLE, PADDR, and write data must remain stable until the completion edge. Which APB stability assertion fails first?

Waveform for APB Select Drops During a Wait State. Signals: PSEL, PENABLE, PREADY, PADDR. Numbered markers identify sampled columns.
Read the sampled columns from left to right, then test each choice against the stated timing rule.
02

Answer choices (4)