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DescriptionQ917
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Q917DVNVIDIAASIC interview problem

Fix event-loss and shared-state monitor bugs

TechniquesDVSystemVerilogConcurrencyRace conditions
DifficultyMedium
TopicVerification
LanguageSystemVerilog
Requirements4 checkpoints
01

Problem

A monitor starts waiting for interrupt only after write_start, but an earlier interrupt must cancel the next write. Concurrent task calls also share static locals. Identify and fix both bugs.

Starting declarationSystemVerilog
// Events: write_start, interrupt, reset
// Multiple re-entrant monitor calls may be active.

Example input and output

Use this case to check your interpretation
Input
interrupt at cycle 5; write_start at cycle 6
Output
The cycle-6 write is canceled and the pending interrupt is consumed
Explanation

A lifetime interrupt collector preserves the event before any write-specific task starts.

02

Requirements (4)

  • Capture interrupts continuously in persistent state or a queue.
  • Atomically consume a pending interrupt when a write begins.
  • Use automatic per-call storage or transaction objects.
  • Define reset to clear pending interrupts and cancel active work deterministically.