DescriptionQ488
Q488DVASIC interview problem
Transaction handle reuse
TechniquesUVMChecking architecture
DifficultyMedium
TopicReference Models
LanguageSystemVerilog
Format4 choices
01
Problem
A monitor allocates tr once, updates it each cycle, and calls ap.write(tr). A scoreboard pushes each received handle into a queue. Later every queue entry shows the last sampled values. What is the best explanation and repair?
02
