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DescriptionQ264
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Q264ArchASIC interview problem

Constrain eight aligned nonoverlapping memory regions

TechniquesAddress mapAlignmentNonoverlapWidening
DifficultyHard
TopicMemory Systems
LanguageSystemVerilog
Requirements4 checkpoints
01

Problem

Generate eight ordered byte-addressed regions inside a 1 MiB space with four-byte-aligned bases, sizes from 16 through 4096 bytes, and no overlap.

Starting declarationSystemVerilog
rand bit [20:0] base[8];
rand bit [12:0] size[8];

Example input and output

Use this case to check your interpretation
Input
region 0: base 0, size 16; region 1: base 16, size 32
Output
legal adjacent regions with exclusive endpoints 16 and 48
Explanation

Both bases are aligned, the second begins at the first region's endpoint, and neither region extends beyond 1 MiB.

02

Requirements (4)

  • Require base[i][1:0] == 0 and size[i] inside 16 through 4096.
  • Order the regions by increasing base.
  • Place each region at or beyond the widened endpoint of its predecessor.
  • Require every widened base-plus-size endpoint to be at most 1 MiB.