Values, shape, storage, and layout

SystemVerilog Data Types

Eight raised bit tiles join into one packed word. — One word. Many interpretations.

Choose a value system, object kind, container, and bit layout deliberately—then prove the boundaries where representation changes.

A practical guide to 2-state and 4-state values, nets and variables, packed and unpacked aggregates, dynamic containers, enums, unions, casts, and streaming.

17 direct practice links3 chaptersReviewed July 2026

The language bench / 01

Same bits. Different meaning.

8-bit source wordMSB → LSB

Click a bit to cycle through 0, 1, X and Z.

Source101001104-state destination10100110

Value domain

Interpretation

Decimal value166

All eight bits contribute to an unsigned value.

logic [7:0] source = 8'b10100110;
logic [7:0] value = source;
// value = 8'b10100110, decimal: 166

Question-first preparation

Choose a question to investigate.

Practice a real question, then inspect the mechanism in its section.

Recommended start

One representative prompt from each major mechanism. Open any card in the live question bank.

Complete question directoryFilter every stable practice link by mechanism.17 questions

Showing 17 questions across every track.Choose a track to narrow the practice set without changing its stable question links.

Inspect the concept map

Declaration microscopeRead value, packed shape, object, then elements.

;

lane[0]byte 1byte 0

lane[1]byte 1byte 0

lane[2]byte 1byte 0

lane[3]byte 1byte 0

Value domainlogic

Four-state values preserve 0, 1, X, and Z for debug and protocol checks.

Find a section

Chapter 1 · Values & layout

Separate what a value can represent from how an object is driven.

The fastest route to correct SystemVerilog is to make two decisions independently: the value domain of the data and the object semantics of the name that carries it.

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Chapter 1 · Values & layout

Packed dimensions shape bits; unpacked dimensions shape elements.

Range placement changes arithmetic, slicing, assignment compatibility, memory inference, and the order in which bits travel through a conversion.

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Chapter 2 · Containers & aggregates

Choose a container by access pattern, lifetime, and ownership.

Dynamic arrays, queues, and associative arrays all grow at run time, but they solve different problems and have different copying, ordering, and missing-entry semantics.

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Chapter 2 · Containers & aggregates

Use aggregates to make layout and validity explicit.

Structures group simultaneously valid fields. Unions overlay alternatives. Packing determines whether the aggregate has a contiguous, portable bit representation.

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Chapter 3 · Types & conversion

Encode legal state spaces instead of memorizing raw numbers.

Enums, strings, time, real-valued types, and forward declarations improve intent when their conversion and tool-boundary rules are made explicit.

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Chapter 3 · Types & conversion

Make every representation crossing directional and testable.

Casting, assignment patterns, concatenation, part-selects, and streaming operators answer different questions. Choosing the right one prevents a visually plausible but bit-reversed adapter.

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Practice Data Types in the question bank →

The reasoning path

One declaration · four representation decisions

Follow every bit until its shape and ownership are unambiguous.

Value domain, object kind, dimensionality, storage, and serialization are separate decisions. Read them in order so a convenient declaration cannot hide a lossy conversion or aliased object.

01Represent
Choose 2-state or 4-state observability and signedness.
02Shape
Separate contiguous packed bits from indexed elements.
03Store
Match fixed or dynamic storage to access and lifetime.
04Translate
Prove casts, streams, and foreign-language boundaries.

Standards and primary references

Check the contract at its source.

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