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FIFO Count Changes on Simultaneous Push and Pop

EasyWaveform DebuggingSystemVerilog

The FIFO is neither full nor empty. push and pop are accepted whenever asserted. count is the occupancy after each edge. Rule to apply: One accepted push adds one entry, one accepted pop removes one entry, and simultaneous accepted push and pop leave count unchanged. What causes the count mismatch at C3?

Waveform for FIFO Count Changes on Simultaneous Push and Pop. Signals: push, pop, count. Numbered markers identify sampled columns.
Read the sampled columns from left to right, then test each choice against the stated timing rule.
Choose one

Answer choices

  1. A. The first push at C1 is counted twice.
  2. B. The FIFO rejects both operations and should reduce count to two.
  3. C. The pop occurs while the FIFO is empty.
  4. D. The logic counts the push but fails to subtract the simultaneous pop.
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