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Controllability · observability · test quality

DFT Engineer Interview Questions

Connect scan architecture, ATPG fault models, memory test, JTAG access, response compaction, X containment, at-speed timing, diagnosis, and implementation signoff.

18questions5technical areas2linked guides

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Showing 18 of 18All questions visible
  1. Q1010ASIC FlowOrder the digital ASIC implementation flowDesign · Physical DesignEasyP
  2. Q864DFTScan shift versus captureDFT · ScanEasyP
  3. Q447DFTGenerate a scan shift-capture sequenceDFT · ScanMediumP
  4. Q163DFTEight-bit scan-chain RTLDFT · ScanMedium
  5. Q091DFT and Physical DesignSummarize one 32-bit scan-unload mismatchDesign · DFTEasy
  6. Q246DFT and Physical DesignFour-bit JTAG instruction registerDesign · DFTMedium
  7. Q382DFTArchitect scan, MBIST, and JTAG accessDesign · DFTHardP
  8. Q392DFT and Physical DesignContain unknowns before scan compactionDesign · DFTMediumP
  9. Q502DFT and Physical DesignModel a four-bit MISR signatureDesign · DFTMediumP
  10. Q670DFT and Physical DesignDetect a transition-delay fault at speedDesign · DFTMediumP
  11. Q499DFT and Physical DesignFind each scan chain's first failing patternDesign · DFTHardP
  12. Q556DFT and Physical DesignDrive a complete March C-minus memory testDesign · DFTHardP
  13. Q317Physical Design and DFTChoose a pattern for an adjacent-row disturb faultDesign · DFTEasyP
  14. Q936Physical Design and DFTChoose the operation that exposes a stuck-at-zero SRAM cellDesign · DFTEasyP
  15. Q993Formal VerificationFind vectors that expose internal stuck-at faultsDV · DesignMediumP
  16. Q1048Formal VerificationTest 128 lines for stuck faults and pairwise shortsDV · DesignHardP
  17. Q1006Physical Design and DFTScan-shift testbench modelDesign · DFTMediumP
  18. Q1062Physical Design and DFTCount unique detected faultsDesign · DFTMediumP

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  • Easy5
  • Medium9
  • Hard4

Related learning

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These are the guides most often linked by questions in this collection.

  1. 01DFT and Memory TestReview scan, ATPG, fault models, compaction, MBIST, March tests, and JTAG.17
  2. 02Physical ImplementationReview floorplanning, clocks, routing, congestion, power integrity, and reliability.1
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