Skip to question
ASIC.FYI
DesignVerificationSystemVerilogFirmwareArchitectureInterviews
ASIC.FYI/Interview questions/Token-Bucket Rate-Limit Monitor

Q268·Free·SystemVerilog

Token-Bucket Rate-Limit Monitor

Difficulty
Medium
Topic
Performance Control
Language
SV
Interview prompt

Question

Model a token-bucket limiter and verify whether each packet should be accepted or throttled. Tokens accumulate while idle but never exceed the configured burst capacity.

Starting point

Question code

class TokenBucket;
  function new(int capacity, int refill_tokens, int refill_period);
  void tick();
  bit accept(int cost);
  int available_tokens();
endclass
Reviewed example

Trace one case

Input
capacity=4, refill=1 token/cycle
cycle 0 request cost=3
cycle 1 request cost=2
cycle 2 request cost=2
Expected output
cycle 0 allow (tokens 1)
cycle 1 allow after refill (tokens 0)
cycle 2 deny after refill (tokens 1)

Tokens saturate at capacity, refill before admission, and are consumed only by allowed requests.

What to cover

Requirements

  1. Refill at the configured rate and saturate exactly at capacity.
  2. A packet is accepted only when its complete cost can be consumed without underflow.
  3. Define deterministic ordering when refill and consume occur in the same cycle.
  4. Reject invalid configuration and nonpositive packet cost.
Exact question handoffPractice Q268

Solve it in the question bank, keep your progress, and reveal the reviewed solution when your access allows.

Open in question bank →
Solution accessA Free account unlocks the complete reviewed solution.
Continue learning

SystemVerilog

  • Performance Control
  • Rate limiting
  • Saturating arithmetic
  • Statistics
Interview preparation guide →
Continue practicing

Related questions

Q091 · CoherenceMSI Cache-Coherence Directory Scoreboard→Q039 · Reference ModelsPriority Interrupt Controller Reference Model→Q069 · Timing ModelsDRAM Bank Timing Checker→
ASIC.FYI · Learn silicon end to end.info@asic.fyi