Q084FreeFirmware

Priority Interrupt Controller Reference Model

Difficulty: Hard
Topic: Reference Models
Language: SV

Interview prompt

Question

Model an interrupt controller with masking, programmable priorities, edge- and level-triggered sources, and explicit claim/complete operations. Higher numerical priority wins, with the lowest source ID breaking ties. Non-nested means one outstanding claim per source; different sources may be in service together. Configure each valid source once before use.

Interrupt eligibility filters pending, masked and in-service state before priority and ID arbitration; separate edge and level tables show line updates, claim and completion. — Pending captures rising edges or follows the asserted level. Masking and in-service state control eligibility; completion permits another claim without manufacturing a low-level event.

Candidate starting point

Implementation scaffold

class InterruptModel #(int N = 64);
  bit configured[N], edge_mode[N], masked[N];
  bit line[N], pending[N], in_service[N];
  int prio[N];

  function bit legal(int src);
    return src inside {[0:N-1]} && configured[src];
  endfunction

  function void configure(int src, int new_priority, bit edge_triggered);
    // TODO: configure a source before it is used.
  endfunction
  function void set_mask(int src, bit is_masked);
    // TODO: update mask eligibility without discarding captured events.
  endfunction
  function void set_line(int src, bit asserted);
    // TODO: update edge or level pending state.
  endfunction
  function bit claim(output int src);
    // TODO: select an eligible pending source and begin service.
  endfunction
  function bit complete(int src);
    // TODO: finish service and preserve any new pending event.
  endfunction
endclass

Reviewed example

Trace one case

Input

Edge-triggered pending interrupts: irq2 priority1, irq5 priority3, irq7 priority3; none masked or in service; claim and complete each in turn.

Expected output

grant irq5; after completion grant irq7, then irq2

The model selects the highest priority and applies the documented deterministic tie-break between equal-priority requests.

What to cover

Requirements

claim returns the highest-priority unmasked pending source with deterministic tie-breaking.
An edge-triggered source latches an event; a level source remains pending while asserted.
A source already in service cannot be claimed again under the base non-nested policy.
Detect invalid completion and preserve pending state correctly when masking changes.

Continue practicing

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class InterruptModel #(int N = 64); bit configured[N], edge_mode[N], masked[N]; bit line[N], pending[N], in_service[N]; int prio[N]; function bit legal(int src); return src inside {[0:N-1]} && configured[src]; endfunction function void configure(int src, int new_priority, bit edge_triggered); // TODO: configure a source before it is used. endfunction function void set_mask(int src, bit is_masked); // TODO: update mask eligibility without discarding captured events. endfunction function void set_line(int src, bit asserted); // TODO: update edge or level pending state. endfunction function bit claim(output int src); // TODO: select an eligible pending source and begin service. endfunction function bit complete(int src); // TODO: finish service and preserve any new pending event. endfunction endclass

Question

Implementation scaffold

Trace one case

Requirements

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