Hardware interview practice
SystemVerilog Interface Modports Explained
Which modport declarations correctly describe a master that drives req and observes gnt, and a slave with the opposite roles?
interface bus_if; logic req, gnt; /* modports here */ endinterfaceAnswer choices
- A. modport master(input req, output gnt); modport slave(output req, input gnt);
- B. modport master(inout req, gnt); modport slave(inout req, gnt);
- C. modport master(output req, input gnt); modport slave(input req, output gnt);
- D. modport master(ref req, gnt); modport slave(ref req, gnt);
Concise answer
The answer and the key reason
Deeper explanation
Work through the implementation and tradeoffs
The requester originates `req`, making that signal an output in the master view and an input in the slave view. The responder originates `gnt`, so its directions are reversed. Declaring these complementary views lets the same interface instance expose a role-appropriate contract to each component. That is the intended producer-consumer relationship in this handshake.
A modport does not create another signal or insert logic; it controls how interface members are presented through a particular connection. Besides documenting the protocol, direction restrictions can catch accidental writes from a component that should only observe a signal. `inout` or `ref` would grant broader access than this handshake requires.
What to remember
- Directions are endpoint-relative
- Master drives `req`
- Slave drives `gnt`
Practice the complete prompt