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Start_item and finish_item

EasyUVM ComponentsSystemVerilog

What does start_item(req) accomplish before finish_item(req) sends the request?

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Answer choices

  1. A. It broadcasts req to every analysis subscriber
  2. B. It drives req directly onto the DUT pins
  3. C. It automatically constructs the driver
  4. D. It waits until the sequence is granted access to the sequencer for that item
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