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Hardware interview practice

Recognize write-back cache behavior

EasyComputer ArchitectureSystemVerilog

A processor writes one resident cache line ten times. Main memory sees no write until the dirty line is evicted. Which policy is this?

Choose one

Answer choices

  1. A. Write-through with no-write-allocate
  2. B. Write-back
  3. C. Read-only cache
  4. D. Victim-cache-only behavior
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