Hardware interview practice
Reason for miss-status entries
A cache should continue serving hits and issue another miss while an earlier line fill is still outstanding. What structure is needed to track those unfinished misses?
Choose one
Answer choices
- A. One global busy bit that blocks every cache access until any miss completes.
- B. A larger replacement-policy counter for each set, with no transaction ID or line address.
- C. A second copy of the tag RAM that contains only valid bits for completed lines.
- D. A miss-status holding register entry for each outstanding cache line, including its fill state and waiting request information.