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Procedural delays

EasySystemVerilogSystemVerilog

Assuming the time unit is 1 ns, at what simulation times are x assigned 1 and 2?

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Question code

int x;
initial begin
  x = 0;
  #5 x = 1;
  #3 x = 2;
end
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Answer choices

  1. A. 5 ns and 3 ns
  2. B. 5 ns and 8 ns
  3. C. 0 ns and 8 ns
  4. D. Both at 8 ns
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