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Hardware interview practice

Order the digital ASIC implementation flow

EasyASIC FlowSystemVerilog

Which ordering best matches a conventional digital ASIC flow?

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Answer choices

  1. A. Routing, RTL, synthesis, floorplan, verification
  2. B. Tapeout, clock-tree synthesis, synthesis, RTL
  3. C. RTL and verification, synthesis and DFT, floorplan and power plan, placement and CTS, routing, extraction and signoff, tapeout
  4. D. Floorplan, software compilation, package design, RTL
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