Hardware interview practice
Coordinate two sequencers with a virtual sequence
Coordinate register programming, configuration completion, parallel packet and status traffic, and a reset that may interrupt the scenario.
Starting point
Question code
reg_sequencer reg_seqr;
packet_sequencer pkt_seqr;
reset_sequencer rst_seqr;Reviewed example
Work through one case
Input
register configuration completes; packet and status children start; reset completes firstExpected output
traffic children stop, expected responses flush by policy, and unrelated testbench processes continueThe named scenario scope and explicit child handles limit cancellation to work owned by this virtual sequence.
What to cover
Requirements
- Factory-create every child sequence.
- Use typed handles to compatible sequencers.
- Express required ordering and deliberate parallelism explicitly.
- Confine reset cleanup to the scenario and define scoreboard/response flushing.