1,000+ ASIC Interview Questions: SystemVerilog, UVM & RTL

DescriptionQ209

Q209DVDesignASIC interview problem

Cover handshakes and backpressure

TechniquesUVMCoverageBackpressureCross coverage

DifficultyMedium

TopicFunctional Coverage

LanguageSystemVerilog

Requirements4 checkpoints

Problem

Create a UVM coverage subscriber for completed ready/valid transactions. Cover operation type, burst length, stall duration, errors, and a small set of meaningful interactions.

Example input and output

Use this case to check your interpretation

Input

completed monitor transactions: READ len=1 stall=0 ok; WRITE len=16 stall=3 error; READ len=4 stall=8 ok

Output

hits include zero/short/long stall bins, boundary lengths 1 and 16, READxzero-stall, WRITExshort-stall, and WRITExerror

Explanation

Only completed handshakes are sampled; the focused crosses capture operation/stall and operation/error behavior without crossing every field.

Requirements (4)

Sample observed completed transactions from a monitor, not attempted driver items.
Bin zero, short, and long stalls and include boundary burst lengths.
Cross only interactions tied to a verification goal, such as operation by stall class and error by operation.
Keep coverage separate from scoreboard checking and stimulus generation.