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DescriptionQ007
Q007DVASIC interview problem

Constrain a size-aligned address

TechniquesRandomizationAlignmentDependent fields
DifficultyEasy
TopicConstraints
LanguageSystemVerilog
Requirements3 checkpoints
01

Problem

Randomize an address in 0x8000_0000 through 0x8000_FFFF with transfer size 1, 2, 4, or 8, aligned to that size.

Example input and output

Use this case to check your interpretation
Input
randomize size from {1,2,4,8} and address in 0x8000_0000..0x8000_FFFF
Output
One valid result: size=8, address=0x8000_0040
Explanation

The transfer size is legal, the address is inside the aperture, and 0x8000_0040 modulo 8 is zero. Other aligned pairs are valid.

02

Requirements (3)

  • Choose only legal power-of-two transfer sizes.
  • Keep the address inside the inclusive aperture.
  • Require addr modulo size to equal zero.