Skip to the selected question
ASIC.FYI

ASIC Question Bank

1,000+ hardware interview questions
DescriptionQ490
Q490DesignDVASIC interview problem

Bound the promise of a two-flop synchronizer

TechniquesDesignDVCDCSynchronizerMetastability
DifficultyEasy
TopicClock Domain Crossing
LanguageSystemVerilog
Format4 choices
01

Problem

A slowly changing one-bit status crosses into an unrelated destination clock domain. Which statement accurately describes a two-flop synchronizer?

02

Answer choices (4)