DescriptionQ640
Q640DesignArchASIC interview problem
Implement a parameterized binary-to-Gray converter
TechniquesDesignSystemVerilogGray codeCombinational logic
DifficultyEasy
TopicRTL Design
LanguageSystemVerilog
Requirements4 checkpoints
01
Problem
Write a synthesizable, parameterized combinational block that converts a binary pointer to Gray code without changing bit order.
Module declarationSystemVerilog
module bin_to_gray #(
parameter int W = 4
) (
input logic [W-1:0] bin,
output logic [W-1:0] gray
);Example input and output
Use this case to check your interpretationInput
W=4, bin=4'b1010Output
gray=4'b1111Explanation
Shifting 1010 right produces 0101, and 1010 XOR 0101 equals 1111.
02
Requirements (4)
- Use one combinational relation with no state.
- Support every legal parameter value W >= 1.
- Preserve the declared bit order.
- State the exact binary-to-Gray relation.