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DescriptionQ924
Q924DesignDVASIC interview problem

Diagnose storage from an incomplete always_comb block

TechniquesDesignSystemVerilogCombinational logicLatch inference
DifficultyEasy
TopicRTL Design
LanguageSystemVerilog
Format4 choices
01

Problem

An always_comb block assigns y only when enable is high and has neither a default assignment nor an else branch. What hardware behavior does that incomplete assignment imply?

Starting declarationSystemVerilog
always_comb begin
  if (enable)
    y = data;
end
02

Answer choices (4)