1,000+ ASIC Interview Questions: SystemVerilog, UVM & RTL

DescriptionQ766

Q766FWDVASIC interview problem

Co-verify a memory-mapped minimum stack

TechniquesFWDVMMIOStackError handling

DifficultyEasy

TopicHardware-Software Integration

LanguageSystemVerilog

Requirements4 checkpoints

Problem

Build the firmware wrapper and reference model for a signed 16-entry memory-mapped I/O (MMIO) stack supporting push, pop, top, and minimum.

Type declarationSystemVerilog

typedef enum { MSTACK_OK, MSTACK_BAD_ARG, MSTACK_HW_ERROR, MSTACK_TIMEOUT } mstack_status_t;
mstack_status_t mstack_exec(uint8_t op, int16_t arg,
                            int16_t *result, uint32_t timeout);
// WDATA, CMD{GO,OP}, RDATA
// STATUS{BUSY,DONE,EMPTY,FULL}, ERROR{UNDERFLOW,OVERFLOW}
// OP: PUSH=0, POP=1, TOP=2, MIN=3; depth=16

Example input and output

Use this case to check your interpretation

Input

PUSH 5; PUSH 2; MIN; POP; MIN

Output

MIN returns 2; POP returns 2; final MIN returns 5

Explanation

The auxiliary minimum state follows successful pushes and pops, while the read-only MIN operation leaves depth unchanged.

Requirements (4)

Validate the operation and required result pointer before MMIO, write push data before GO, and clear stale completion state.
Model only GO commands accepted while idle; TOP and MIN observe without changing depth.
Underflow or overflow completes with an error while preserving stack contents and RDATA; error has priority over DONE.
Keep sticky completion and error bits until write-one-to-clear, ignore GO while busy, and cancel visible state on reset.