DescriptionQ983
Q983DVDesignASIC interview problem
Always_comb
TechniquesSystemVerilogBasic scheduling
DifficultyEasy
TopicSystemVerilog
LanguageSystemVerilog
Format4 choices
01
Problem
Which statement about always_comb is correct?
Starting declarationSystemVerilog
logic a, b, hidden_enable, y;
function automatic logic helper(input logic value);
return value & hidden_enable;
endfunction
always_comb y = a & helper(b);02